{"id":4241,"date":"2021-05-15T19:21:46","date_gmt":"2021-05-15T17:21:46","guid":{"rendered":"https:\/\/blog.rwth-aachen.de\/itc-events\/?post_type=tribe_events&p=4241"},"modified":"2021-05-15T19:21:46","modified_gmt":"2021-05-15T17:21:46","slug":"ppces-2013","status":"publish","type":"tribe_events","link":"https:\/\/blog.rwth-aachen.de\/itc-events\/event\/ppces-2013\/","title":{"rendered":"PPCES 2013"},"content":{"rendered":"
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Parallel Programming in Computational Engineering and Science 2013<\/strong><\/h3>\n
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HPC Seminar and Workshop<\/h3>\n

Monday, March 17 – Friday, March 21, 2013<\/h3>\n

Extension Building of the
\nCenter for Computing and Communication RWTH Aachen University<\/p>\n

Kopernikusstra\u00dfe 6, seminar rooms 3 + 4<\/p>\n<\/td>\n

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kindly supported by:<\/h6>\n<\/td>\n
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Introduction<\/h4>\n
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This event will continue the tradition of previous annual week-long events taking place in Aachen every spring since 2001.<\/p>\n<\/div>\n<\/div>\n

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Throughout the week, we will cover serial (Monday) and parallel programming using MPI (Tuesday) and OpenMP (Wednesday) in Fortran and C \/ C++ as well as performance tuning. Furthermore, we will introduce the participants to GPGPU programming with OpenACC (Thursday) and provide a brief introduction to the new Intel Many Integrated Core Architecture (Friday) as well as the opportunities for hands-on exercises including a „bring-your-own-code“ session.<\/p>\n

These topics are presented in a modular way, so that you can choose, pick and register for single days in order to let you invest your time as efficiently as possible.<\/p>\n

<\/a>Agenda and Registration<\/h4>\n

The preliminary \u00a0<\/span>\u00a0<\/span>agenda can be found here<\/span><\/span><\/a>.<\/span><\/p>\n

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Part I: Introduction, Parallel Computing Architectures, Serial Tuning – Monday, March 17<\/strong><\/h4>\n

After an introduction to the principles of today’s parallel computing architectures, the configuration of the new components of the RWTH Compute Cluster delivered by the company Bull will be explained. As good serial performance is the basis for good parallel performance, we cover serial tuning before introducing parallelization paradigms
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Part II: Message Passing with MPI – Tuesday, March\u00a018 <\/strong><\/h4>\n

The Message Passing Interface (MPI) is the de-facto standard for programming large HPC Clusters. We will introduce the basic concepts and give an overview of some advanced features. Furthermore, we will introduce the TotalView debugger and a selection of performance tools. We will also cover hybrid parallelization, i.e. the combination of MPI and shared memory programming. Hybrid parallelization is gaining popularity as the number of cores per cluster node is growing.\u00a0<\/strong><\/p>\n

Part III: Shared Memory Programming with OpenMP – Wednesday, March\u00a019 <\/strong><\/h4>\n
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OpenMP is a widely used approach for programming shared memory architectures, which is supported by most compilers nowadays. We will cover the basics of the programming paradigm as well as some advanced topics, such as programming NUMA machines or clusters, coherently coupled with the vSMP software from ScaleMP. We will also cover a selection of performance and verification tools for OpenMP. The RWTH Compute Cluster comprises a large number of big SMP machines (up to 128 cores and 2 TB of main memory) as we consider shared memory programming a vital alternative for applications which cannot be easily parallelized with MPI. We also expect a growing number of application codes to combine MPI and OpenMP for clusters of nodes with a growing number of cores.<\/p>\n

\"palladion\"<\/p>\n

There\u00a0was a sponsored social dinner on Wednesday, March 13 at 19:00<\/strong> in Restaurant Palladion<\/u><\/a> <\/strong>Aachen<\/p>\n<\/div>\n

Part IV: GPGPU Programming with OpenACC – Thursday, March 20 <\/strong><\/h4>\n

OpenACC is a directive-based programming model for accelerators which enables delegating the responsibility for low-level (e.g. CUDA or OpenCL) programming tasks to the compiler. To this end, using the OpenACC API, the programmer can offload compute-intensive loops to an attached accelerator with little effort. The open industry standard OpenACC has been introduced in November 2011 and supports accelerating regions of code in standard C, C++ and Fortran. It provides portability across operating systems, host CPUs and accelerators.<\/p>\n

During this workshop day, we will give an overview on OpenACC while focusing on NVIDIA GPUs. We will introduce the GPU architecture and explain very briefly how a usual CUDA program looks like. Then, we will dive into OpenACC and learn about its possibilities to accelerate code regions. We will cover topics such as offloading loops, managing data movement between host and device, tuning data movement and accesses, applying loop schedules, using multiple GPUs or interoperate with CUDA libraries. At the end, we will give an outlook to the OpenMP 4.0 standard that may include OpenMP for accelerators. Hands-on sessions are done on the RWTH Aachen GPU (Fermi) Cluster using PGI’s OpenACC implementation.\u00a0\u00a0 <\/strong><\/p>\n

Part V: Programming the Intel\u00ae Xeon Phi\u2122 Coprocessor, Tune your own Code – Friday, March\u00a021 <\/strong><\/h4>\n

Accelerators, like GPUs, are one way to fulfill the requirement for more and more compute power. However, they often require a laborious rewrite of the application using special programming paradigms like CUDA or OpenCL.The Intel Xeon Phi coprocessor is based on the Intel Many Integrated Core Architecture and can be programmed with standard techniques like OpenMP, POSIX threads, or MPI. We will give a brief introduction to this new architecture and demonstrate the different programming possibilities. For the labs you can also continue working on lab exercises or to get started with porting or tuning your own codes (not only for Xeon Phi). Don\u2018t put your expectations too high though, as time for working on large codes is limited. You will profit more from this opportunity the better you are prepared.<\/p>\n

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<\/a>Speakers<\/strong><\/h4>\n

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IMPORTANT (for RWTH members only)!<\/h5>\n

Please note that all RWTH members (except UKA) need a PC pool account (which is not the same as the cluster account) to take part in the hands-on sessions.<\/p>\n

Please find related information here<\/u><\/a>.<\/p>\n<\/div>\n

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<\/a>Participants<\/strong><\/h4>\n
Attendees should be comfortable with C\/C++ or Fortran programming and interested in learning more about the technical details of application tuning and parallelization. The presentations will be given in English.<\/div>\n<\/div>\n<\/div>\n
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Course Materials<\/strong><\/h4>\n
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