{"id":4282,"date":"2021-05-15T19:44:17","date_gmt":"2021-05-15T17:44:17","guid":{"rendered":"https:\/\/blog.rwth-aachen.de\/itc-events\/?post_type=tribe_events&p=4282"},"modified":"2021-05-15T19:44:17","modified_gmt":"2021-05-15T17:44:17","slug":"aixcelerate-2018","status":"publish","type":"tribe_events","link":"https:\/\/blog.rwth-aachen.de\/itc-events\/event\/aixcelerate-2018\/","title":{"rendered":"aiXcelerate 2018"},"content":{"rendered":"

Der Eintrag ist nur auf English<\/a> verf\u00fcgbar.<\/p>

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HPC Tuning Workshop<\/strong><\/h2>\n

Mon, Dec 3\u00a0 – Wed, Dec 5, 2018<\/h3>\n

IT Center<\/h4>\n

RWTH Aachen University<\/h4>\n

sponsored by:<\/em><\/p>\n

\u00a0<\/strong><\/p>\n

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Introduction<\/h3>\n

aiXcelerate HPC Tuning Workshop had the focus on the Intel Skylake (SKK) Microarchitecture, SIMD programming and performance tuning using Likwid, Intel VTune\/Amplifier and Intel Advisor.<\/p>\n

The nodes of CLAIX-2018, the latest RWTH Aachen University\u2019s Supercomputer, were equipped with Intel Skylake processors and connected through a network with the Intel OmniPath architecture (OPA). It was a major extension of CLAIX-2016 system equipped with Intel\u00a0 Broadwell processors and connected through OPA, too.<\/p>\n

Researchers from FZ J\u00fclich and RWTH with high demand for compute power can apply for resources on these systems as part of the JARA-HPC partition (>>> more…<\/a> ).
\nResearchers from all over Germany can apply for resources on Claix (>>> more…<\/a> ).<\/p>\n

The workshop consisted of presentations open to a broader auditorium and of a hands-on tuning workshop for a limited number of selected computing projects.
\nPresentations was\u00a0 given in English.<\/p>\n

We awere proud to announce Michael Klemm<\/a> and Christopher Dahnken<\/a>, two HPC performance experts from Intel, who gave presentations and support your tuning efforts. Furthermore, a presentation on detecting performance limiting factors with hardware monitoring using likwid was given by Thomas Gruber<\/a> (born R\u00f6hl) main developer of the Likwid<\/a> tool. Experts of the HPC Team<\/a> of the IT Center at RWTH Aachen University assisted in your tuning activietes as well.<\/p>\n

Materials<\/h3>\n
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  1. Agenda<\/a><\/span><\/li>\n
  2. Sandra Wienke (RWTH): aiXcelerate Welcome & CLAIX-2018 Overview<\/a><\/span><\/li>\n
  3. Marcus Wagner, Paul Kapinos (RWTH): SLURM and Modules for CLAIX-2018<\/a><\/span><\/li>\n
  4. Jonas Hahnfeld (RWTH): Performance Monitoring on CLAIX<\/a><\/span><\/li>\n
  5. Michael Klemm (Intel): Skylake Architecture<\/a><\/span><\/li>\n
  6. Michael Klemm (Intel): Skylake Performance Considerations<\/a><\/span><\/li>\n
  7. Michael Klemm (Intel): Intel VTune Amplifier<\/a><\/span><\/li>\n
  8. Thomas Gruber (FAU Erlangen): LIKWID, Detecting Performance Limiting Factors with Hardware Monitoring<\/a>
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    Registration<\/h3>\n

    Closed<\/p>\n

    aiXcelerate 2018 – Presentations<\/h3>\n
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    1. Dec 3, 11:00-13:00 – On Mon morning, Dec 3, we started at 11:00 with presentations on the new CLAIX-2018 cluster and the Skylake processor microarchitecture<\/li>\n
    2. Dec 3, 14:00-15:00 – After lunch on Monday, we continued with presentations on SIMD programming and performance optimization.<\/li>\n
    3. Dec 4, 11:00-13:00 – On Tuesday morning, Dec 4, we started at 11:00 with presentations on Likwid, Intel VTune\/Amplifier and Advisor.<\/li>\n<\/ol>\n

      aiXcelerate 2018 – Tuning Workshop<\/h3>\n

      After the presentations on Mon Dec 3, on Tue Dec4, and also throughout Wed, Dec 5, we provided you with hands-on opportunity to adapt, analyze and tune your performance critical applications on CLAIX, with its Skylake (and Broadwell) processors connected with the Intel OmniPath (OPA) fabric.<\/p>\n

      Participation in the presentations was a prerequisite for participation in tuning workshop.<\/p>\n

      Attendees were kindly requested to prepare and bring in their own code.<\/strong> It was assumed that you had a good working knowledge with MPI and\/or OpenMP, and C\/C++ or Fortran, whatever your compute project employs. To maximize the efficiency of the workshop, we asked the participants to prepare one or more test cases that reflected typical production runs, but did not take too long to execute – in the ideal case, a run didnot\u00a0 take more than 5 to 10 minutes to finish. Members of the local HPC team supported every accepted project in porting the code to Claix. By the start of the workshop the code was asked be ready to be analyzed.<\/p>\n

      Furthermore, each participant (or participating group) was kindly asked to shortly present their project (1-2 slides) at the beginning of the tuning workshop and also shortly present the outcome of the tuning efforts at the end of the workshop.<\/p>\n

      Participants who were intested in the tuning activities contacted us by sending an email to hpcevent@itc.rwth-aachen.de<\/a>.<\/p>\n

      Workshop participants were invited to take part in the social dinner on Tuesday, Dec 4 in the restaurant Palladion<\/a>.<\/p>\n

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      Costs
      \n<\/strong><\/h3>\n

      Attendance was free of charge and supported by our sponsors.
      \nTravel and accommodation were at participants own expense.<\/p>\n

      Links to previous Events<\/h3>\n
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