{"id":16011,"date":"2023-06-19T12:30:25","date_gmt":"2023-06-19T10:30:25","guid":{"rendered":"https:\/\/blog.rwth-aachen.de\/itc\/?p=16011"},"modified":"2023-06-22T17:56:34","modified_gmt":"2023-06-22T15:56:34","slug":"h2m-2","status":"publish","type":"post","link":"https:\/\/blog.rwth-aachen.de\/itc\/en\/2023\/06\/19\/h2m-2\/","title":{"rendered":"H2M \u2013 More Control and Efficiency in Systems with Heterogeneous Memory"},"content":{"rendered":"<div class=\"twoclick_social_bookmarks_post_16011 social_share_privacy clearfix 1.6.4 locale-en_US sprite-en_US\"><\/div><div class=\"twoclick-js\"><script type=\"text\/javascript\">\/* <![CDATA[ *\/\njQuery(document).ready(function($){if($('.twoclick_social_bookmarks_post_16011')){$('.twoclick_social_bookmarks_post_16011').socialSharePrivacy({\"txt_help\":\"Wenn Sie diese Felder durch einen Klick aktivieren, werden Informationen an Facebook, Twitter, Flattr, Xing, t3n, LinkedIn, Pinterest oder Google eventuell ins Ausland \\u00fcbertragen und unter Umst\\u00e4nden auch dort gespeichert. N\\u00e4heres erfahren Sie durch einen Klick auf das <em>i<\\\/em>.\",\"settings_perma\":\"Dauerhaft aktivieren und Daten\\u00fcber-tragung zustimmen:\",\"info_link\":\"http:\\\/\\\/www.heise.de\\\/ct\\\/artikel\\\/2-Klicks-fuer-mehr-Datenschutz-1333879.html\",\"uri\":\"https:\\\/\\\/blog.rwth-aachen.de\\\/itc\\\/en\\\/2023\\\/06\\\/19\\\/h2m-2\\\/\",\"post_id\":16011,\"post_title_referrer_track\":\"H2M+%E2%80%93+More+Control+and+Efficiency+in+Systems+with+Heterogeneous+Memory\",\"display_infobox\":\"on\"});}});\n\/* ]]> *\/<\/script><\/div><p><div id=\"attachment_16019\" style=\"width: 310px\" class=\"wp-caption alignright\"><img loading=\"lazy\" decoding=\"async\" aria-describedby=\"caption-attachment-16019\" class=\"size-medium wp-image-16019\" src=\"https:\/\/blog.rwth-aachen.de\/itc\/files\/2023\/06\/Bild2-300x200.jpg\" alt=\"H2M saver and disk components\" width=\"300\" height=\"200\" srcset=\"https:\/\/blog.rwth-aachen.de\/itc\/files\/2023\/06\/Bild2-300x200.jpg 300w, https:\/\/blog.rwth-aachen.de\/itc\/files\/2023\/06\/Bild2-768x512.jpg 768w, https:\/\/blog.rwth-aachen.de\/itc\/files\/2023\/06\/Bild2.jpg 952w\" sizes=\"auto, (max-width: 300px) 100vw, 300px\" \/><p id=\"caption-attachment-16019\" class=\"wp-caption-text\">Source: Freepik<\/p><\/div><\/p>\n<p>In the DFG-funded project &#8220;Heuristics for Heterogeneous Memory&#8221; (H2M), RWTH Aachen University and the French project partner Inria are jointly developing support for new memory technologies such as High Bandwidth Memory (HBM) and Non-Volatile Memory (NVM). These technologies are increasingly used as additional memory in HPC systems alongside the common Dynamic Random Access Memory (DRAM). HBM offers higher bandwidth than classic DRAM but is also much smaller. NVM provides larger capacities but is slower compared to DRAM. The different characteristics and capacity limits thus raise the question of how systems with heterogeneous memory can be used efficiently and in which memory data should be stored.<\/p>\n<p><!--more--><\/p>\n<div id=\"attachment_16021\" style=\"width: 310px\" class=\"wp-caption alignright\"><img loading=\"lazy\" decoding=\"async\" aria-describedby=\"caption-attachment-16021\" class=\"wp-image-16021 size-medium\" src=\"https:\/\/blog.rwth-aachen.de\/itc\/files\/2023\/06\/Bild3-300x225.jpg\" alt=\"Six project workers\" width=\"300\" height=\"225\" srcset=\"https:\/\/blog.rwth-aachen.de\/itc\/files\/2023\/06\/Bild3-300x225.jpg 300w, https:\/\/blog.rwth-aachen.de\/itc\/files\/2023\/06\/Bild3.jpg 337w\" sizes=\"auto, (max-width: 300px) 100vw, 300px\" \/><p id=\"caption-attachment-16021\" class=\"wp-caption-text\">Christian Terboven, Brice Goglin, Emmanuel Jeannot, Cl\u00e9ment Foyer, Anara Kozhokanova and Jannis Klinkenberg <br \/>Source: Own illustration<\/p><\/div>\n<p>To use the new memory technologies, applications currently must be heavily modified and platform- or manufacturer-specific application programming interfaces (APIs) must be used.<\/p>\n<p>Since the beginning of the 2021 project, H2M has been pursuing the goal of providing portable interfaces to identify available memories and their properties and to enable access. Based on this, allocation abstractions and heuristics are developed to give application developers as well as runtime systems control in which storage data is placed and when data should be moved between different types of storage. In our <a href=\"https:\/\/blog.rwth-aachen.de\/itc\/en\/2021\/04\/23\/h2m\/\">blog post 2021<\/a>, we already presented the beginning of the project. At that time, it was still unclear how abstractions and heuristics should look like. Now the researchers are already a big step further and have developed these allocation abstractions.<\/p>\n<p><strong>\u00a0<\/strong><\/p>\n<h3><span style=\"color: #005495;\"><strong>With the right traits to the right memory<\/strong><\/span><\/h3>\n<p>The idea is to abstract the commonly used memory allocation functions such as malloc (in C) and new (in C++) by a new allocation function (h2m_alloc_w_traits). With this, application developers can pass additional properties (so-called traits) to an allocation, which could describe how the data is used in the course of the application or how the data will be accessed or which requirements the allocation must fulfil. This can be seen in the following example.<\/p>\n<p><code><span style=\"color: #0000ff;\">int <\/span><span style=\"color: #00ccff;\">err;<\/span><\/code><br \/>\n<code><span style=\"color: #0000ff;\">double* <\/span><span style=\"color: #00ccff;\">data_item;<\/span><\/code><br \/>\n<code><span style=\"color: #0000ff;\">size t <\/span><span style=\"color: #00ccff;\">N = <\/span><span style=\"color: #99cc00;\">1000 * <\/span><span style=\"color: #0000ff;\">sizeof(<\/span><span style=\"color: #0000ff;\">double); <\/span><span style=\"color: #339966;\">\/\/ desired size (in bytes)<\/span><\/code><\/p>\n<p><code><span style=\"color: #339966;\">\/\/ Specify allocation traits (requirements and hints)<\/span><\/code><br \/>\n<code><span style=\"color: #00ff00;\">h2m_alloc_trait_t <\/span><span style=\"color: #00ccff;\">traits[<\/span><span style=\"color: #99cc00;\">5] = {<\/span><\/code><br \/>\n<code style=\"padding-left: 40px;\">h2m_atk_access_mode,    h2m_atv_access_mode_readwrite,<\/code><br \/>\n<code style=\"padding-left: 40px;\">h2m_atk_access_origin,  h2m_atv_access_origin_multiple_threads,<\/code><br \/>\n<code style=\"padding-left: 40px;\">h2m_atk_access_pattern, h2m_atv_access_pattern_strided,<\/code><br \/>\n<code style=\"padding-left: 40px;\">h2m_atk_access_stride,  <span style=\"color: #99cc00;\">3 <\/span><span style=\"color: #339966;\">\/* in bytes *\/,<\/span><\/code><br \/>\n<code style=\"padding-left: 40px;\">h2m_atk_access_freq,    <span style=\"color: #99cc00;\">2000<\/span>, <span style=\"color: #339966;\">\/* e.g., accesses per sec *\/<\/span>};<\/code><\/p>\n<p><code><span style=\"color: #339966;\">\/\/ Finally allocate memory<\/span><\/code><br \/>\n<code><span style=\"color: #00ccff;\">data_item = (<\/span><span style=\"color: #0000ff;\">double*<\/span>) h2m_alloc_w_traits(<span style=\"color: #00ccff;\">N<\/span>, &<span style=\"color: #00ccff;\">err<\/span>, <span style=\"color: #99cc00;\">5<\/span>, <span style=\"color: #00ccff;\">traits<\/span>);<\/code><\/p>\n<p>In this code example, it is specified for the allocation that the data is accessed by multiple threads in a reading and writing manner, and it is expected to be in a non-linear fashion, but with a stride of 3. This means that only every 3rd value is used. Threads are independent instruction flows that can be processed concurrently and are often used in parallel programming to speed up applications.<\/p>\n<p>As Figure 1 shows, the H2M runtime system can then use strategies to determine the appropriate memory to store the data. This considers both traits and the memory technologies available in the system. Among other things, H2M provides simple base strategies, but also offers the possibility to create and use user-defined strategies through an interface.<\/p>\n<div id=\"attachment_16118\" style=\"width: 310px\" class=\"wp-caption alignnone\"><a href=\"https:\/\/blog.rwth-aachen.de\/itc\/files\/2023\/06\/H2M-Overview-1.png\"><img loading=\"lazy\" decoding=\"async\" aria-describedby=\"caption-attachment-16118\" class=\"wp-image-16118 size-medium\" src=\"https:\/\/blog.rwth-aachen.de\/itc\/files\/2023\/06\/H2M-Overview-1-300x160.png\" alt=\"table of H2M\" width=\"300\" height=\"160\" srcset=\"https:\/\/blog.rwth-aachen.de\/itc\/files\/2023\/06\/H2M-Overview-1-300x160.png 300w, https:\/\/blog.rwth-aachen.de\/itc\/files\/2023\/06\/H2M-Overview-1-1024x547.png 1024w, https:\/\/blog.rwth-aachen.de\/itc\/files\/2023\/06\/H2M-Overview-1-768x410.png 768w, https:\/\/blog.rwth-aachen.de\/itc\/files\/2023\/06\/H2M-Overview-1-1536x820.png 1536w, https:\/\/blog.rwth-aachen.de\/itc\/files\/2023\/06\/H2M-Overview-1.png 1787w\" sizes=\"auto, (max-width: 300px) 100vw, 300px\" \/><\/a><p id=\"caption-attachment-16118\" class=\"wp-caption-text\">Figure 1: Overview of H2M components and interaction with application and system environment Source: Own illustration<\/p><\/div>\n<h3><span style=\"color: #005495;\"><strong><br \/>\nBroad-based &#8211; evaluation on several architectures and current research direction<\/strong><\/span><\/h3>\n<p>The new concept is being evaluated with various proxy applications, so-called mini-apps, and benchmarks on different architectures. Examples are Intel&#8217;s KNL architecture, which is equipped with MCDRAM (HBM) memory modules in addition to DRAM. This is smaller but offers a higher bandwidth. In addition, an architecture has been evaluated that has large amounts of Intel Optane DC Persistent Memory (NVM or non-volatile memory) in addition to the usual DDR4, which is slower but provides more capacity in return.<\/p>\n<p>Up to now, the focus of the research was on scenarios in which data objects were allocated once in certain memory types and stay there for the entirety of the program execution. However, current and future research is also investigating the extent to which dynamic movement of data between memory types at execution time can increase efficiency. This is interesting, for example, when applications consist of several execution phases in which the data is used differently or in which access patterns to data change significantly.<\/p>\n<p>&nbsp;<\/p>\n<hr \/>\n<p>Responsible for the content of this article are <a href=\"https:\/\/www.itc.rwth-aachen.de\/cms\/it-center\/IT-Center\/Profil\/Team\/~epvp\/Mitarbeiter-CAMPUS-\/?gguid=0x592B0D17C73A1249AC2C233FADF6EE96&amp;allou=1\">Janin Vreydal<\/a> and <a href=\"https:\/\/www.itc.rwth-aachen.de\/cms\/it-center\/IT-Center\/Profil\/Team\/~epvp\/Mitarbeiter-CAMPUS-\/?gguid=0xB9156201FCE42A4EBEB710490A672F37&amp;allou=1\">Jannis Klinkenberg<\/a>.<\/p>","protected":false},"excerpt":{"rendered":"<p>Sorry, this entry is only available in Deutsch.<\/p>\n","protected":false},"author":5003,"featured_media":16019,"comment_status":"open","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"c2c_always_allow_admin_comments":false,"footnotes":""},"categories":[924,316,315],"tags":[925,23,927,926],"class_list":["post-16011","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-hpcnews","category-projekte-kooperationen","category-services-support","tag-h2m","tag-hpc","tag-intel","tag-memory"],"aioseo_notices":[],"_links":{"self":[{"href":"https:\/\/blog.rwth-aachen.de\/itc\/en\/wp-json\/wp\/v2\/posts\/16011","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/blog.rwth-aachen.de\/itc\/en\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/blog.rwth-aachen.de\/itc\/en\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/blog.rwth-aachen.de\/itc\/en\/wp-json\/wp\/v2\/users\/5003"}],"replies":[{"embeddable":true,"href":"https:\/\/blog.rwth-aachen.de\/itc\/en\/wp-json\/wp\/v2\/comments?post=16011"}],"version-history":[{"count":29,"href":"https:\/\/blog.rwth-aachen.de\/itc\/en\/wp-json\/wp\/v2\/posts\/16011\/revisions"}],"predecessor-version":[{"id":16123,"href":"https:\/\/blog.rwth-aachen.de\/itc\/en\/wp-json\/wp\/v2\/posts\/16011\/revisions\/16123"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/blog.rwth-aachen.de\/itc\/en\/wp-json\/wp\/v2\/media\/16019"}],"wp:attachment":[{"href":"https:\/\/blog.rwth-aachen.de\/itc\/en\/wp-json\/wp\/v2\/media?parent=16011"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/blog.rwth-aachen.de\/itc\/en\/wp-json\/wp\/v2\/categories?post=16011"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/blog.rwth-aachen.de\/itc\/en\/wp-json\/wp\/v2\/tags?post=16011"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}