RRAMs (Resistive Random Access Memory) have resistive switching characteristics and show potential for fast speeds, high energy efficiency, and three-dimensional stacking. We aim to overcome the limitations of traditional von Neumann architecture by employing RRAM for in-memory storage and computation. Considering the widespread use of Deep Neural Networks (DNNs) in complex tasks, we target the energy-intensive Vector-Matrix Multiplication (VMM) in DNNs, leveraging a resistive crossbar with RRAM to perform computations within the memory and reduce data transfers.

To address challenges in the early stages of RRAM crossbar array model design, we introduce FPGA-based emulation. This approach utilizes FPGA’s configurable nature and hardware resources to enhance parallelism. We observed a substantial reduction in emulation time on FPGA compared to simulation time for the 128 x 128 crossbar size, approximately by a factor of 365.

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